diff -ur uc-origs/uClinux-2.4.27-uc1/arch/armnommu/mach-cx821xx/cnxtflash.c uClinux-2.4.27-uc1/arch/armnommu/mach-cx821xx/cnxtflash.c --- uc-origs/uClinux-2.4.27-uc1/arch/armnommu/mach-cx821xx/cnxtflash.c 2004-12-12 21:48:45.000000000 +0100 +++ uClinux-2.4.27-uc1/arch/armnommu/mach-cx821xx/cnxtflash.c 2005-01-21 17:26:34.000000000 +0100 @@ -27,12 +27,26 @@ #include #include -#define CNXT_FLASH_WRITE_START 0x040C000 -#define CNXT_FLASH_MAX_SEGMENTS 8 -#define CNXT_FLASH_SEGMENT_SIZE 2048 +#define SUPPORT_SST_FLASH +#define CNXT_FLASH_TOTAL_SIZE 0x4000 // Total amount of reserved flash (16 Kbytes) +#ifdef CONFIG_BD_TIBURON +#define CNXT_FLASH_WRITE_START 0x0404000 // starting address +#else +#define CNXT_FLASH_WRITE_START 0x040C000 // starting address +#endif +#ifdef CONFIG_BD_TIBURON +#define CNXT_FLASH_MAX_SEGMENTS 8 // Number of segments +#else +#define CNXT_FLASH_MAX_SEGMENTS 16 // Number of segments +#endif #define UNUSED __attribute__((unused)) #define CNXT_FLASH_DRIVER_VERSION "001" -#define CNXT_FLASH_MIN_BLOCK_SIZE 8 * 1024 // 8KBYTES +#ifndef SUPPORT_SST_FLASH +#define CNXT_FLASH_MIN_BLOCK_SIZE 0x2000 // Smallest writable area (8 Kbytes) +#else +static unsigned long CNXT_FLASH_MIN_BLOCK_SIZE=0x2000; // Smallest writable area (8 Kbytes) +#endif /* SUPPORT_SST_FLASH */ +#define CNXT_FLASH_BLOCK_OFFSET (CNXT_FLASH_TOTAL_SIZE / CNXT_FLASH_MIN_BLOCK_SIZE) #if 0 #define DPRINTK(format, args...) printk("cnxtflash.c: " format, ##args) @@ -47,8 +61,8 @@ BOOL CnxtFlashRead( UINT16 * pflashStartAddr, UINT16 * psdramStartAddr, UINT32 size ); BOOL CnxtFlashProg( UINT16* pSrcAddr, UINT16* pDestAddr, UINT32 uBytes ); BOOL CnxtFlashVerifyDeviceID( UINT16 *uDeviceID ); -BOOL CnxtFlashEraseBlock( UINT16* pBlockAddr, UINT16 *uDeviceID ); -BOOL CnxtFlashProgramLocation( UINT16* pSrcAddr, UINT16* pDestAddr ); +BOOL CnxtFlashEraseBlock( volatile UINT16* pBlockAddr, UINT16 *uDeviceID ); +BOOL CnxtFlashProgramLocation( volatile UINT16* pSrcAddr, volatile UINT16* pDestAddr, UINT16 *uDeviceIDofFLASH ); void CnxtFlashClearStatusReg( void ); BOOL CnxtFlashWaitForDone( BOOL ); BOOL CnxtFlashVerifyMemory( UINT16* pSrcAddr, UINT16* pDestAddr, UINT32 uBytes ); @@ -56,9 +70,134 @@ void CnxtFlashToggleBit ( void ); DWORD CnxtFlashCalcCRC32( BYTE *pData, DWORD dataLength ); +#if 0 static CNXT_FLASH_SEGMENT_T cnxtFlashSegments[CNXT_FLASH_MAX_SEGMENTS]; static BYTE cnxtFlashBuffer[CNXT_FLASH_MIN_BLOCK_SIZE]; static BOOL cnxtFlashLocked[CNXT_FLASH_MAX_SEGMENTS]; +#else +CNXT_FLASH_SEGMENT_T cnxtFlashSegments[CNXT_FLASH_MAX_SEGMENTS]; +#ifdef SUPPORT_SST_FLASH +BYTE cnxtFlashBuffer[0x2000]; //0X2000 must be the max in the min block sizes +#else +BYTE cnxtFlashBuffer[CNXT_FLASH_MIN_BLOCK_SIZE]; +#endif /* SUPPORT_SST_FLASH */ + +BOOL cnxtFlashLocked[CNXT_FLASH_MAX_SEGMENTS]; +#endif + +#ifdef SUPPORT_SST_FLASH +/* + * set CNXT_FLASH_MIN_BLOCK_SIZE according to the flash id +*/ +void __init setBootsectorBlocksize( void ) +{ + UINT16 uDeviceID; + UINT16 uMfrId; + UINT16 DeviceIDofFLASH; + UINT16 *uDeviceIDofFLASH=&DeviceIDofFLASH; + + /* Go into "read identifer" mode for the Intel type part*/ + *pCUIReg = READ_IDENTIFIER; + + uDeviceID = *pDeviceIDReg; + uMfrId = *pMfrIDReg; + + /*Check to see if it is an Intel or Sharp flash*/ + switch ( uDeviceID ) + { + case DEVICE_ID_INTELB3_BB_2M: + case DEVICE_ID_INTELC3_BB_2M: + case DEVICE_ID_INTELB3_BB_4M: + case DEVICE_ID_INTELC3_BB_4M: + case DEVICE_ID_INTELB3_BB_1M: + *uDeviceIDofFLASH = INTEL_TYPE_FLASH_BB; + *pCUIReg = READ_ARRAY_INTEL; + break; + + case DEVICE_ID_SHARP_BB_2M: + *uDeviceIDofFLASH = SHARP_TYPE_FLASH_BB_2M; + *pCUIReg = READ_ARRAY_INTEL; + break; + + case DEVICE_ID_INTELB3_TB_2M: case DEVICE_ID_INTELC3_TB_2M: + *uDeviceIDofFLASH = INTEL_TYPE_FLASH_TB_2M; + *pCUIReg = READ_ARRAY_INTEL; + break; + + default: + *uDeviceIDofFLASH = UNSUPPORTED_FLASH; + *pCUIReg = READ_ARRAY_INTEL; + break; + } + + if( *uDeviceIDofFLASH == UNSUPPORTED_FLASH ) + { + + *pCUIReg = READ_ARRAY_SST; + CnxtFlashSetupSST(); + *p5555Reg = READ_IDENTIFIER; + + uDeviceID = *pDeviceIDReg; + uMfrId = *pMfrIDReg; + /* Check to see if it is an SST, ST-Micro, AMD or MXIC flash */ + switch ( uDeviceID ) + { + case DEVICE_ID_SST_2M: + DPRINTK("SST 2MB FLASH device!\n"); +#ifdef SUPPORT_SST_FLASH + CNXT_FLASH_MIN_BLOCK_SIZE = 0x1000; +#endif /* SUPPORT_SST_FLASH */ + *uDeviceIDofFLASH = SST_TYPE_FLASH_BB_2M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_STM_TB_2M: + *uDeviceIDofFLASH = STM_TYPE_FLASH_TB_2M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_STM_BB_2M: + if ( uMfrId == MFR_ID_MXIC) + *uDeviceIDofFLASH = MXIC_TYPE_FLASH_BB_2M; + else + *uDeviceIDofFLASH = STM_TYPE_FLASH_BB_2M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_AMD_BB_4M: + *uDeviceIDofFLASH = AMD_TYPE_FLASH_BB_4M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_HYNIX_BB_4M: + *uDeviceIDofFLASH = HYNIX_TYPE_FLASH_BB_4M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_MXIC_BB_4M: + *uDeviceIDofFLASH = MXIC_TYPE_FLASH_BB_4M; + *pCUIReg = READ_ARRAY_SST; + break; + + // Derek 8.20.2002 + case DEVICE_ID_ATMEL_BB_2M: + *uDeviceIDofFLASH = ATMEL_TYPE_FLASH_BB_2M; + *pCUIReg = READ_ARRAY_SST; + break; + + default: + *uDeviceIDofFLASH = UNSUPPORTED_FLASH; + *pCUIReg = READ_ARRAY_SST; + break; + } + } + + if(*uDeviceIDofFLASH == UNSUPPORTED_FLASH) + { + printk("Unsupported FLASH device!\n"); + } +} +#endif /* SUPPORT_SST_FLASH */ static int __init UNUSED CnxtFlashInit( void ) { @@ -97,6 +236,7 @@ cnxtFlashSegments[i].startFlashAddress = (DWORD)startOfSegmentAddress; cnxtFlashSegments[i].startDataAddress = (DWORD)startOfSegmentAddress + headerSize; cnxtFlashSegments[i].owner = i; + printk("Initializing Flash data Segment %d, %lX \n", i + 1,cnxtFlashSegments[i].startDataAddress); // Calculate the new headerCRC and save it. headerCRC = CnxtFlashCalcCRC32( (BYTE *) &cnxtFlashSegments[i], headerDataSize ); @@ -144,13 +284,15 @@ CNXT_FLASH_STATUS_E Status = CNXT_FLASH_SUCCESS; DWORD headerSize = sizeof( CNXT_FLASH_SEGMENT_T ); DWORD dataCRC; + ULONG offset; // Check for a valid segment number. - if( segment < CNXT_FLASH_SEGMENT_1 || segment > CNXT_FLASH_SEGMENT_8 ) + if( segment < CNXT_FLASH_SEGMENT_1 || segment > CNXT_FLASH_SEGMENT_16 ) { - return FALSE; + printk("Incorrect Flash Segment number!\n" ); + return CNXT_FLASH_DATA_ERROR; } - + // Check for owner if( segment != cnxtFlashSegments[segment].owner ) { @@ -179,18 +321,58 @@ if( cnxtFlashSegments[segment].dataLength > CNXT_FLASH_SEGMENT_SIZE ) cnxtFlashSegments[segment].dataLength = CNXT_FLASH_SEGMENT_SIZE; +#ifdef SUPPORT_SST_FLASH + offset = ((segment * CNXT_FLASH_SEGMENT_SIZE)/ CNXT_FLASH_MIN_BLOCK_SIZE + 1) * + CNXT_FLASH_MIN_BLOCK_SIZE - CNXT_FLASH_SEGMENT_SIZE; + + if( cnxtFlashSegments[segment].startDataAddress > ( CNXT_FLASH_WRITE_START + offset ) ) { + return CNXT_FLASH_DATA_ERROR; + } + else { + // Calculate the new segment data CRC. + dataCRC = CnxtFlashCalcCRC32( + (BYTE *) cnxtFlashSegments[segment].startDataAddress, + cnxtFlashSegments[segment].dataLength + ); + } +#else + if( segment > CNXT_FLASH_SEGMENT_8 ) + { + offset = CNXT_FLASH_BLOCK_OFFSET * CNXT_FLASH_MIN_BLOCK_SIZE - CNXT_FLASH_SEGMENT_SIZE; + + DPRINTK("CNXT_FLASH_BLOCK_OFFSET: %x\n", CNXT_FLASH_BLOCK_OFFSET); + DPRINTK("CNXT_FLASH_MIN_BLOCK_SIZE: %x\n", CNXT_FLASH_MIN_BLOCK_SIZE); + + DPRINTK("offset: %lx\n", offset); + DPRINTK("cnxtFlashSegments[segment].startDataAddress: %lx\n",cnxtFlashSegments[segment].startDataAddress); + DPRINTK("cnxtFlashSegments[segment].startFlashAddress: %lx\n", cnxtFlashSegments[segment].startFlashAddress); + DPRINTK("CNXT_FLASH_WRITE_START + offset: %lx\n", CNXT_FLASH_WRITE_START + offset); - if( cnxtFlashSegments[segment].startDataAddress >= ( CNXT_FLASH_WRITE_START + CNXT_FLASH_MIN_BLOCK_SIZE ) ) + if( cnxtFlashSegments[segment].startFlashAddress > (CNXT_FLASH_WRITE_START + offset) ) { return CNXT_FLASH_DATA_ERROR; - else { - // Calculate the new segment data CRC. - dataCRC = CnxtFlashCalcCRC32( - (BYTE *) cnxtFlashSegments[segment].startDataAddress, - cnxtFlashSegments[segment].dataLength - ); + } + else { + // Calculate the new segment data CRC. + dataCRC = CnxtFlashCalcCRC32( + (BYTE *) cnxtFlashSegments[segment].startDataAddress, + cnxtFlashSegments[segment].dataLength + ); + } - } + } else { + if( cnxtFlashSegments[segment].startDataAddress > ( CNXT_FLASH_WRITE_START + offset ) ) { + return CNXT_FLASH_DATA_ERROR; + } + else { + // Calculate the new segment data CRC. + dataCRC = CnxtFlashCalcCRC32( + (BYTE *) cnxtFlashSegments[segment].startDataAddress, + cnxtFlashSegments[segment].dataLength + ); + } + } +#endif /* SUPPORT_SST_FLASH */ DPRINTK( "cnxtFlashSegments[%d].dataCRC = %x dataCRC = %x\n", segment, @@ -199,8 +381,14 @@ ); // Check the data CRC - if( cnxtFlashSegments[segment].dataCRC != dataCRC ) + if( cnxtFlashSegments[segment].dataCRC != dataCRC ){ + #ifdef CONFIG_BD_TIBURON + printk("Flash data crc error\n"); + Status = CNXT_FLASH_DATA_CRC_ERROR; + #else Status = CNXT_FLASH_DATA_ERROR; + #endif + } // Mark the segment as unmarked. cnxtFlashLocked[segment] = FALSE; @@ -230,10 +418,13 @@ // Make sure maximum size is not exceeded. if( size > CNXT_FLASH_SEGMENT_SIZE - sizeof( CNXT_FLASH_SEGMENT_T ) ) +#ifdef CONFIG_BD_TIBURON + size=CNXT_FLASH_SEGMENT_SIZE - sizeof( CNXT_FLASH_SEGMENT_T ); +#else return FALSE; - +#endif // Check for a valid segment number. - if( segment < CNXT_FLASH_SEGMENT_1 || segment > CNXT_FLASH_SEGMENT_8 ) + if( segment < CNXT_FLASH_SEGMENT_1 || segment > CNXT_FLASH_SEGMENT_16 ) { return FALSE; } else { @@ -266,11 +457,11 @@ { DWORD dataCRC; DWORD headerSize = sizeof( CNXT_FLASH_SEGMENT_T ); - DWORD startOfSegment; + DWORD flashBlockOffset; DWORD flashBlock; BOOL bSuccess = FALSE; - // Make sure data pointer is not NULL. + // Make sure data pointer is not NULL. if( !psdramStartAddr ) { return bSuccess; } @@ -278,21 +469,25 @@ // Make sure there is enough room for the data. if( size > CNXT_FLASH_SEGMENT_SIZE - sizeof( CNXT_FLASH_SEGMENT_T ) ) { +#ifdef CONFIG_BD_TIBURON + size=CNXT_FLASH_SEGMENT_SIZE - sizeof( CNXT_FLASH_SEGMENT_T ); +#else return bSuccess; +#endif } // Check for a valid segment number. - if( segment < CNXT_FLASH_SEGMENT_1 || segment > CNXT_FLASH_SEGMENT_8 ) + if( segment < CNXT_FLASH_SEGMENT_1 || segment > CNXT_FLASH_SEGMENT_16 ) { return bSuccess; } else { // Make sure the segment is not locked. - if( cnxtFlashLocked[segment] ) { + if( cnxtFlashLocked[segment] ) { printk( "Flash Segment Locked! (Try opening it first)\n" ); return FALSE; } - + if( size > CNXT_FLASH_SEGMENT_SIZE - headerSize ) return FALSE; else @@ -316,40 +511,63 @@ headerSize ); - if( segment > CNXT_FLASH_SEGMENT_4 ) - flashBlock = CNXT_FLASH_SEGMENT_5; + + if( segment > CNXT_FLASH_SEGMENT_8 ) + { + flashBlock = CNXT_FLASH_SEGMENT_9; + flashBlockOffset = (segment * CNXT_FLASH_SEGMENT_SIZE) - CNXT_FLASH_MIN_BLOCK_SIZE; + } else + { flashBlock = CNXT_FLASH_SEGMENT_1; + flashBlockOffset = (segment * CNXT_FLASH_SEGMENT_SIZE); + } - DPRINTK( - "flashBlock = %d\n", - flashBlock - ); - + DPRINTK("flashBlock = %d\n", flashBlock ); +#ifdef SUPPORT_SST_FLASH + if (CNXT_FLASH_SEGMENT_SIZE == CNXT_FLASH_MIN_BLOCK_SIZE) { + flashBlock = segment; + flashBlockOffset = 0; + } + else { + //flashblock - the first segment num of the block which this segment is in + //flashBlockOffset - the offset of this segment in the block + int num_block; //start from 0 segment start from 0 + int segs_per_block; + + segs_per_block = CNXT_FLASH_MIN_BLOCK_SIZE / (CNXT_FLASH_SEGMENT_SIZE); + num_block = (segment * CNXT_FLASH_SEGMENT_SIZE)/ CNXT_FLASH_MIN_BLOCK_SIZE; + flashBlock = num_block * segs_per_block; + flashBlockOffset = segment * (CNXT_FLASH_SEGMENT_SIZE) - + num_block * CNXT_FLASH_MIN_BLOCK_SIZE; +/* printk ("flashBlock2 = %ld, %ld seg=%ld, %ld, %ld, m/s=%ld, %ld\n", flashBlock, flashBlockOffset, + segment, CNXT_FLASH_SEGMENT_SIZE, CNXT_FLASH_MIN_BLOCK_SIZE, + num_block, + segs_per_block);*/ + } +#endif /* SUPPORT_SST_FLASH */ // Read in the minimum flash block size (8kbytes) - memcpy( + memcpy + ( &cnxtFlashBuffer[0], (BYTE *)cnxtFlashSegments[flashBlock].startFlashAddress, CNXT_FLASH_MIN_BLOCK_SIZE ); // Copy the flash segment header + DPRINTK("flashBlockOffset = %x\n", flashBlockOffset ); - startOfSegment = segment * CNXT_FLASH_SEGMENT_SIZE; - DPRINTK( - "startOfSegment = %x\n", - startOfSegment - ); - - memcpy( - &cnxtFlashBuffer[startOfSegment], + memcpy + ( + &cnxtFlashBuffer[flashBlockOffset], &cnxtFlashSegments[segment], headerSize - ); + ); // Copy the data - memcpy( - &cnxtFlashBuffer[startOfSegment + headerSize], + memcpy + ( + &cnxtFlashBuffer[flashBlockOffset + headerSize], psdramStartAddr, size ); @@ -431,14 +649,16 @@ UINT32 uBytesChk; UINT16 uDeviceID; + printk ("CnxtFlashProg src=%x, dst=%x, size=%d\n", + pSrcAddr, pDestAddr, uBytes); /* Save the addresses and byte count for later validation */ pSrcAddrChk = pSrcAddr; pDestAddrChk = pDestAddr; uBytesChk = uBytes; /* Make sure the right device is installed */ - bSuccess = CnxtFlashVerifyDeviceID(&uDeviceID); - + bSuccess = CnxtFlashVerifyDeviceID( &uDeviceID ); + // Erase a 8kbyte block beginning at pDestAddr bSuccess &= CnxtFlashEraseBlock( pDestAddr, &uDeviceID ); @@ -447,7 +667,7 @@ { /* Program a location */ - bSuccess = CnxtFlashProgramLocation( pSrcAddr, pDestAddr ); + bSuccess = CnxtFlashProgramLocation( pSrcAddr, pDestAddr, &uDeviceID ); /* Update memory pointers and byte counter */ ++pSrcAddr; @@ -455,8 +675,6 @@ uBytes -= 2; } - *pCUIReg = READ_ARRAY; - /* Verify the data */ if(bSuccess) bSuccess = CnxtFlashVerifyMemory( pSrcAddrChk, pDestAddrChk, uBytesChk ); @@ -475,56 +693,113 @@ * Outputs: Returns TRUE if the correct device is installed, FALSE if not * ***************************************************************************/ - -BOOL CnxtFlashVerifyDeviceID( UINT16 *uDeviceID ) +BOOL CnxtFlashVerifyDeviceID( UINT16 *uDeviceIDofFLASH ) { - BOOL bSuccess; - UINT16 uMfrID; - -#ifdef INTEL_FLASH - /* Go into "read identifer" mode */ + UINT16 uDeviceID; + UINT16 uMfrId; + BOOL bSuccess; + + /* Go into "read identifer" mode for the Intel type part*/ *pCUIReg = READ_IDENTIFIER; -#else - CnxtFlashSetupSST(); - *p5555Reg = READ_IDENTIFIER; -#endif - uMfrID = *pMfrIDReg; + uDeviceID = *pDeviceIDReg; + uMfrId = *pMfrIDReg; - *uDeviceID = *pDeviceIDReg; - *uDeviceID = *pDeviceIDReg; + /*Check to see if it is an Intel or Sharp flash*/ + switch ( uDeviceID ) + { + case DEVICE_ID_INTELB3_BB_2M: + case DEVICE_ID_INTELC3_BB_2M: + case DEVICE_ID_INTELB3_BB_4M: + case DEVICE_ID_INTELC3_BB_4M: + case DEVICE_ID_INTELB3_BB_1M: + *uDeviceIDofFLASH = INTEL_TYPE_FLASH_BB; + *pCUIReg = READ_ARRAY_INTEL; + break; + + case DEVICE_ID_SHARP_BB_2M: + *uDeviceIDofFLASH = SHARP_TYPE_FLASH_BB_2M; + *pCUIReg = READ_ARRAY_INTEL; + break; + + case DEVICE_ID_INTELB3_TB_2M: case DEVICE_ID_INTELC3_TB_2M: + *uDeviceIDofFLASH = INTEL_TYPE_FLASH_TB_2M; + *pCUIReg = READ_ARRAY_INTEL; + break; + + default: + *uDeviceIDofFLASH = UNSUPPORTED_FLASH; + *pCUIReg = READ_ARRAY_INTEL; + break; + } + if( *uDeviceIDofFLASH == UNSUPPORTED_FLASH ) + { - /* Check them */ - if ( ((uMfrID == MFR_ID_INTEL) - || (uMfrID == MFR_ID_SST) - || (uMfrID == MFR_ID_AMD) - || (uMfrID == MFR_ID_STM) - || (uMfrID == MFR_ID_MXIC) - || (uMfrID == MFR_ID_SHARP)) && - ((*uDeviceID == DEVICE_ID_INTELB3_BB) - || (*uDeviceID == DEVICE_ID_INTELC3_BB) - || (*uDeviceID == DEVICE_ID_INTELB3_BB_4M) - || (*uDeviceID == DEVICE_ID_SST) - || (*uDeviceID == DEVICE_ID_AMD_TB) - || (*uDeviceID == DEVICE_ID_STM_TB) - || (*uDeviceID == DEVICE_ID_SHARP_BB) - || (*uDeviceID == DEVICE_ID_INTELC3_TB) - || (*uDeviceID == DEVICE_ID_INTELB3_TB) - || (*uDeviceID == DEVICE_ID_MXIC_BB) - || (*uDeviceID == DEVICE_ID_AMD_BB) - || (*uDeviceID == DEVICE_ID_STM_BB)) ) + *pCUIReg = READ_ARRAY_SST; + CnxtFlashSetupSST(); + *p5555Reg = READ_IDENTIFIER; + + uDeviceID = *pDeviceIDReg; + uMfrId = *pMfrIDReg; + + /* Check to see if it is an SST, ST-Micro, AMD or MXIC flash */ + switch ( uDeviceID ) { - bSuccess = TRUE; + case DEVICE_ID_SST_2M: + DPRINTK("SST 2MB FLASH device!\n"); + *uDeviceIDofFLASH = SST_TYPE_FLASH_BB_2M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_STM_TB_2M: + *uDeviceIDofFLASH = STM_TYPE_FLASH_TB_2M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_STM_BB_2M: + if ( uMfrId == MFR_ID_MXIC) + *uDeviceIDofFLASH = MXIC_TYPE_FLASH_BB_2M; + else + *uDeviceIDofFLASH = STM_TYPE_FLASH_BB_2M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_AMD_BB_4M: + *uDeviceIDofFLASH = AMD_TYPE_FLASH_BB_4M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_HYNIX_BB_4M: + *uDeviceIDofFLASH = HYNIX_TYPE_FLASH_BB_4M; + *pCUIReg = READ_ARRAY_SST; + break; + + case DEVICE_ID_MXIC_BB_4M: + *uDeviceIDofFLASH = MXIC_TYPE_FLASH_BB_4M; + *pCUIReg = READ_ARRAY_SST; + break; + + // Derek 8.20.2002 + case DEVICE_ID_ATMEL_BB_2M: + *uDeviceIDofFLASH = ATMEL_TYPE_FLASH_BB_2M; + *pCUIReg = READ_ARRAY_SST; + break; + + default: + *uDeviceIDofFLASH = UNSUPPORTED_FLASH; + *pCUIReg = READ_ARRAY_SST; + break; } - else - { - bSuccess = FALSE; } - /* Return to "read array" mode */ - *pCUIReg = READ_ARRAY; - + if(*uDeviceIDofFLASH == UNSUPPORTED_FLASH) + { + bSuccess = FALSE; + printk("Unsupported FLASH device!\n"); + } else + bSuccess = TRUE; + return bSuccess; } @@ -541,147 +816,229 @@ * ***************************************************************************/ -BOOL CnxtFlashEraseBlock( UINT16* pBlockAddr, UINT16 *uDeviceID ) +BOOL CnxtFlashEraseBlock( volatile UINT16* pBlockAddr, UINT16 *uDeviceIDofFLASH ) { BOOL bSuccess=TRUE; + eFlashErase EraseProcedure = DONT_ERASE; -#ifdef INTEL_FLASH - if( - ( - ((*uDeviceID == 0x8897)||(*uDeviceID == 0x8891)||(*uDeviceID == 0x88c3)||(*uDeviceID == 0x00e9)) - && - ( - ((pBlockAddr < BOOT_BLOCK_END) && (((UINT32 )pBlockAddr & ( UINT32 )0x1fff) == ( UINT32 )0x000)) - || ((( UINT32 )pBlockAddr & 0xffff ) == 0x0000 ) - ) - ) - || (( (*uDeviceID == 0x8890)||(*uDeviceID == 0x88c2) ) && ( ((pBlockAddr >= MAIN_BLOCK_END) - && (((UINT32 )pBlockAddr & ( UINT32 )0x1fff) == ( UINT32 )0x000)) - || ((( UINT32 )pBlockAddr & 0xffff ) == 0x0000 ) )) - ) - + switch ( *uDeviceIDofFLASH ) { + case INTEL_TYPE_FLASH_BB: + case SHARP_TYPE_FLASH_BB_2M: + if( (pBlockAddr < BOOT_BLOCK_END) && (((UINT32)pBlockAddr & 0x1fff) == 0x0) ) + EraseProcedure = INTEL; + else if ( 0x0000 == ( (UINT32)pBlockAddr & 0xffff ) ) + EraseProcedure = INTEL; + + break; - /* Clear the status register */ - CnxtFlashClearStatusReg(); + case MXIC_TYPE_FLASH_BB_4M: + case AMD_TYPE_FLASH_BB_4M: + if( (pBlockAddr < BOOT_BLOCK_END) && (((UINT32)pBlockAddr & 0x1fff) == 0x0) ) + EraseProcedure = STM; + else if ( 0x0000 == ( (UINT32)pBlockAddr & 0xffff ) ) + EraseProcedure = STM; + + break; + + case SST_TYPE_FLASH_BB_2M: + DPRINTK("SST_TYPE_FLASH: pBlockAddr = %x\n", pBlockAddr ); + + if( (pBlockAddr < BOOT_BLOCK_END) && (((UINT32)pBlockAddr & 0xfff) == 0x0) ) + { + DPRINTK("Selecting SST EraseProcedure.\n"); + EraseProcedure = SST; + + } else { + if ( 0x0000 == ( (UINT32)pBlockAddr & 0xffff ) ) + { + DPRINTK("Selecting SST EraseProcedure.\n"); + EraseProcedure = SST; + } + } + + break; + + case STM_TYPE_FLASH_BB_2M: + case MXIC_TYPE_FLASH_BB_2M: + case HYNIX_TYPE_FLASH_BB_4M: + if( ( ((pBlockAddr < BOOT_BLOCK_END) && ( ( (UINT32)pBlockAddr == (UINT32)0x406000) + || ( ( UINT32 )pBlockAddr == ( UINT32 )0x404000 ) + || ( ( UINT32 )pBlockAddr == ( UINT32 )0x408000 ) )) + || (((UINT32)pBlockAddr & 0xffff) == 0x0000) ) ) + EraseProcedure = STM; + + break; + + case ATMEL_TYPE_FLASH_BB_2M: + if( (pBlockAddr < BOOT_BLOCK_END) && (((UINT32)pBlockAddr & 0x1fff) == 0x0) ) + EraseProcedure = STM; + else if ( 0x418000 == (UINT32)pBlockAddr ) + EraseProcedure = STM; + else if ( 0x0000 == ( (UINT32)pBlockAddr & 0xffff ) ) + EraseProcedure = STM; - *pCUIReg = UNLOCK_SETUP; - *pBlockAddr = ERASE_CONFIRM; + break; - // Write the 'block erase' (erase setup) command to the CUI register. - *pCUIReg = ERASE_SETUP; - - // Write some data to the start address of the block. This address - // will be latched internally when the 'erase confirm' command is - // issued. - *pBlockAddr = ERASE_CONFIRM; + default: + break; + } - // Write block erase confirm command to the CUI register. - *pCUIReg = ERASE_CONFIRM; + switch (EraseProcedure) + { + case INTEL: + { - /* Wait for erase complete */ - bSuccess &= CnxtFlashWaitForDone( FALSE ); +#if 0 + /* To unlock the blocks of memory in Intel C3 flash */ + *pBlockAddr = UNLOCK_SETUP; + *pBlockAddr = ERASE_CONFIRM_INTEL; + + *pCUIReg = READ_ARRAY_INTEL; + /* Clear the status register */ + CnxtFlashClearStatusReg(); - /* Return to "read array" mode */ - *pCUIReg = READ_ARRAY; - } + if( *uDeviceIDofFLASH == SHARP_TYPE_FLASH_BB_2M ) + bSuccess = CnxtFlashWaitForDone(0); + + /* Write erase setup, erase confirm, and block address */ + *pBlockAddr = ERASE_SETUP_INTEL; + *pBlockAddr = ERASE_CONFIRM_INTEL; + /* Wait for erase complete */ + bSuccess &= CnxtFlashWaitForDone(0); + + /* Return to "read array" mode */ + *pCUIReg = READ_ARRAY_INTEL; #else - #ifdef SST_FLASH - if ( ( ( pBlockAddr < BOOT_BLOCK_END ) AND ( ( ( UINT32 )pBlockAddr & ( UINT32 )0xfff ) EQUALS ( UINT32 )0x000 ) ) OR - ( ( ( UINT32 )pBlockAddr & 0xffff ) EQUALS 0x0000 ) ) - { - CnxtFlashSetupSST(); - *p5555Reg = ERASE_SETUP; - CnxtFlashSetupSST(); - if( pBlockAddr >= BOOT_BLOCK_END ) + /* Clear the status register */ + CnxtFlashClearStatusReg(); + + /* To unlock the blocks of memory in Intel C3 flash */ + *pCUIReg = UNLOCK_SETUP; + *pBlockAddr = ERASE_CONFIRM_INTEL; + + if( *uDeviceIDofFLASH == SHARP_TYPE_FLASH_BB_2M ) + bSuccess = CnxtFlashWaitForDone(0); + + /* Write erase setup, erase confirm, and block address */ + *pCUIReg = ERASE_SETUP_INTEL; + *pBlockAddr = ERASE_CONFIRM_INTEL; + *pCUIReg = ERASE_CONFIRM_INTEL; + + /* Wait for erase complete */ + bSuccess &= CnxtFlashWaitForDone(0); + + /* Return to "read array" mode */ + *pCUIReg = READ_ARRAY_INTEL; + +#endif + } + break; + + case SST: { - *pBlockAddr = BLOCK_ERASE_CONFIRM; + CnxtFlashSetupSST(); + *p5555Reg = ERASE_SETUP_SST; + CnxtFlashSetupSST(); + + if( pBlockAddr >= BOOT_BLOCK_END ) + { + DPRINTK("SST BLOCK_ERASE_CONFIRM.\n"); + *pBlockAddr = BLOCK_ERASE_CONFIRM; + + } else { + DPRINTK("SST SECTOR_ERASE_CONFIRM.\n"); + *pBlockAddr = SECTOR_ERASE_CONFIRM; + + } + while(!(*pBlockAddr & DQ7)); + + //CnxtFlashToggleBit(); + + DPRINTK("SST returning to read array mode.\n"); + /* Return to "read array" mode */ + *pCUIReg = READ_ARRAY_SST; } - else + break; + + case STM: + { + CnxtFlashSetupSST(); + *p5555Reg = ERASE_SETUP_SST; + CnxtFlashSetupSST(); + *pBlockAddr = SECTOR_ERASE_CONFIRM; + + while(!(*pBlockAddr & DQ7)); + //ToggleBit(); - while(!(*pBlockAddr & DQ7)); - //CnxtFlashToggleBit(); - - /* Return to "read array" mode */ - *pCUIReg = READ_ARRAY; - } - #else - if ( (*uDeviceID == 0x22c4 AND ( ((pBlockAddr >= MAIN_BLOCK_END) AND ( ( (UINT32)pBlockAddr == (UINT32)0x5f8000) - OR ( ( UINT32 )pBlockAddr == ( UINT32 )0x5fa000 ) - OR ( ( UINT32 )pBlockAddr == ( UINT32 )0x5fc000 ))) - OR (((UINT32)pBlockAddr & 0xffff) EQUALS 0x0000) ) ) - OR (*uDeviceID == 0x2249 AND ( ((pBlockAddr < BOOT_BLOCK_END) AND ( ( (UINT32)pBlockAddr == (UINT32)0x406000) - OR ( ( UINT32 )pBlockAddr == ( UINT32 )0x404000 ) - OR ( ( UINT32 )pBlockAddr == ( UINT32 )0x408000 ) )) - OR (((UINT32)pBlockAddr & 0xffff) EQUALS 0x0000) ) ) ) - { - CnxtFlashSetupSST(); - *p5555Reg = ERASE_SETUP; - CnxtFlashSetupSST(); + /* Return to "read array" mode */ + *pCUIReg = READ_ARRAY_SST; + } + break; - *pBlockAddr = SECTOR_ERASE_CONFIRM; - - while(!(*pBlockAddr & DQ7)); - //CnxtFlashToggleBit(); + default: + break; - /* Return to "read array" mode */ - *pCUIReg = READ_ARRAY; } - #endif -#endif + return bSuccess; } /**************************************************************************** * - * Name: BOOL CnxtFlashProgramLocation( UINT16* pSrcAddr, UINT16* pDestAddr ) + * Name: BOOL CnxtFlashProgramLocation( UINT16*, UINT16* pDestAddr ) * * Description: Programs a location in the flash * - * Inputs: UINT16* pSrcAddr = address of where to get the data - * UINT16* pDestAddr = flash address to program + * Inputs: UINT16* pSrcAddr = address of where to get the data + * UINT16* pDestAddr = flash address to program * * Outputs: Returns TRUE if programming successful, FALSE if not * ***************************************************************************/ - -BOOL CnxtFlashProgramLocation( UINT16* pSrcAddr, UINT16* pDestAddr ) +BOOL CnxtFlashProgramLocation( volatile UINT16* pSrcAddr, volatile UINT16* pDestAddr, UINT16 *uDeviceIDofFLASH ) { BOOL bSuccess=TRUE; -#ifdef INTEL_FLASH - /* Clear status register */ - CnxtFlashClearStatusReg(); - - #ifdef SHARP_FLASH - /* Wait for reading of status reg */ - bSuccess = CnxtFlashWaitForDone( FALSE ); - #endif - - /* Write program setup */ - *pCUIReg = PROGRAM_SETUP; - - /* Program the location */ - *pDestAddr = *pSrcAddr; + + if( *uDeviceIDofFLASH == INTEL_TYPE_FLASH_BB + || *uDeviceIDofFLASH == SHARP_TYPE_FLASH_BB_2M + || *uDeviceIDofFLASH == INTEL_TYPE_FLASH_TB_2M ) + { /* Clear status register */ + CnxtFlashClearStatusReg(); - /* Wait for program complete */ - bSuccess &= CnxtFlashWaitForDone( FALSE ); + if( *uDeviceIDofFLASH == SHARP_TYPE_FLASH_BB_2M ) + /* Wait for reading of status reg */ + bSuccess = CnxtFlashWaitForDone(0); + + /* Write program setup */ + *pCUIReg = PROGRAM_SETUP_INTEL; - /* Return to "read array" mode */ - *pCUIReg = READ_ARRAY; + /* Program the location */ + *pDestAddr = *pSrcAddr; + + /* Wait for program complete */ + bSuccess &= CnxtFlashWaitForDone(0); -#else - CnxtFlashSetupSST(); - *p5555Reg = PROGRAM_SETUP; - *pDestAddr = *pSrcAddr; - while(*pDestAddr != *pSrcAddr ); - //CnxtFlashToggleBit(); + /* Return to "read array" mode */ + *pCUIReg = READ_ARRAY_INTEL; + } + else + { + + CnxtFlashSetupSST(); + *p5555Reg = PROGRAM_SETUP_SST; + *pDestAddr = *pSrcAddr; - *pCUIReg = READ_ARRAY; -#endif + while( *pDestAddr != *pSrcAddr ); + //CnxtFlashToggleBit(); + *pCUIReg = READ_ARRAY_SST; + + + } return bSuccess; } @@ -698,18 +1055,15 @@ * Outputs: none * ***************************************************************************/ -#ifdef INTEL_FLASH void CnxtFlashClearStatusReg( void ) { *pCUIReg = CLEAR_STATUS_REG; return; } -#endif - /**************************************************************************** * - * Name: BOOL CnxtFlashWaitForDone( void ) + * Name: BOOL CnxtFlashWaitForDone( BOOL ) * * Description: Waits for a process to complete, and checks results * @@ -718,7 +1072,6 @@ * Outputs: Returns TRUE if process successful * ***************************************************************************/ -#ifdef INTEL_FLASH BOOL CnxtFlashWaitForDone( BOOL debugON ) { BOOL bSuccess=TRUE; @@ -767,7 +1120,7 @@ return bSuccess; } -#else + void CnxtFlashToggleBit(void) { UINT16 uFirst_Read, uSecond_Read; @@ -782,8 +1135,6 @@ return; } -#endif - /**************************************************************************** * @@ -894,7 +1245,7 @@ 0xc5a92679, 0xc1683bce, 0xcc2b1d17, 0xc8ea00a0, 0xd6ad50a5, 0xd26c4d12, 0xdf2f6bcb, 0xdbee767c, 0xe3a1cbc1, 0xe760d676, 0xea23f0af, 0xeee2ed18, -0xf0a5bd1d, 0xf464a0aa, 0xf9278673, 0xfde69bc4, +0xf0a5bd1d, 0xf464a0aa797, 0xf9278673, 0xfde69bc4, 0x89b8fd09, 0x8d79e0be, 0x803ac667, 0x84fbdbd0, 0x9abc8bd5, 0x9e7d9662, 0x933eb0bb, 0x97ffad0c, 0xafb010b1, 0xab710d06, 0xa6322bdf, 0xa2f33668, @@ -921,7 +1272,6 @@ } -#ifndef INTEL_FLASH void CnxtFlashSetupSST(void) { *p5555Reg = CMD_AA; @@ -929,8 +1279,6 @@ return; } -#endif - EXPORT_SYMBOL( CnxtFlashWriteRequest ); EXPORT_SYMBOL( CnxtFlashReadRequest ); diff -ur uc-origs/uClinux-2.4.27-uc1/arch/armnommu/mach-cx821xx/cnxtflash.h uClinux-2.4.27-uc1/arch/armnommu/mach-cx821xx/cnxtflash.h --- uc-origs/uClinux-2.4.27-uc1/arch/armnommu/mach-cx821xx/cnxtflash.h 2004-12-12 21:48:45.000000000 +0100 +++ uClinux-2.4.27-uc1/arch/armnommu/mach-cx821xx/cnxtflash.h 2005-01-21 17:30:28.000000000 +0100 @@ -15,132 +15,129 @@ #ifndef _CNXTFLASH_H_ #define _CNXTFLASH_H_ -/* comment SST_FLASH and SHARP_FLASH => program INTEL - comment INTEL_FLASH and SHARP_FLASH => program SST - comment SST_FLASH => program SHARP - comment ALL => program AMD or ST-Micro or MXIC -*/ -#define INTEL_FLASH 1 -#define SHARP_FLASH 1 -//#define SST_FLASH 1 - -#ifdef INTEL_FLASH - #define START_SIZE 0x100000 - #define MAC_SIZE 0xfc // 180 bytes - #define PARMS_SIZE 0x2000 - #define BSP_SIZE 0x170000 - #define FFS_SIZE 0x100000 - #define READ_ARRAY ( UINT16 )0xff - #define PROGRAM_SETUP ( UINT16 )0x40 - #define ERASE_SETUP ( UINT16 )0x20 - #define UNLOCK_SETUP ( UINT16 )0x60 - #define ERASE_CONFIRM ( UINT16 )0xd0 - #define READ_STATUS_REG ( UINT16 )0x70 - #define READ_QUERY ( UINT16 )0x98 - #define CLEAR_STATUS_REG ( UINT16 )0x50 - #define WSMS_READY ( UINT16 )( 1 << 7 ) - #define ERASE_ERR ( UINT16 )( 1 << 5 ) - #define PROG_ERR ( UINT16 )( 1 << 4 ) - #define Vpp_ERR ( UINT16 )( 1 << 3 ) - #define BLOCK_LOCK_ERR ( UINT16 )( 1 << 1 ) - #define FLASH_START_ADDR ( UINT16* )0x400000 - //#define FLASH_MAC_ADDR ( UINT16* )0x40a000 - //#define FLASH_PARMS_ADDR ( UINT16* )0x40c000 - //#define FLASH_BSP_ADDR ( UINT16* )0x410000 - #define FLASH_FFS_ADDR ( UINT16* )0x500000 +#define START_SIZE 0x50000 +#define MAC_SIZE 0xfc // 180 bytes +#define PARMS_SIZE 0x2000 +#define BSP_SIZE 0x170000 +#define FFS_SIZE 0x1b0000 +#define READ_ARRAY_INTEL ( UINT16 )0xff +#define PROGRAM_SETUP_INTEL ( UINT16 )0x40 +#define ERASE_SETUP_INTEL ( UINT16 )0x20 +#define UNLOCK_SETUP ( UINT16 )0x60 +#define ERASE_CONFIRM_INTEL ( UINT16 )0xd0 +#define READ_STATUS_REG ( UINT16 )0x70 +#define CLEAR_STATUS_REG ( UINT16 )0x50 +#define WSMS_READY ( UINT16 )( 1 << 7 ) +#define ERASE_ERR ( UINT16 )( 1 << 5 ) +#define PROG_ERR ( UINT16 )( 1 << 4 ) +#define Vpp_ERR ( UINT16 )( 1 << 3 ) +#define BLOCK_LOCK_ERR ( UINT16 )( 1 << 1 ) -#else - #ifdef SST_FLASH - #define FLASH_START_ADDR ( UINT16* )0x400000 - #define FLASH_MAC_ADDR ( UINT16* )0x40a000 - #define FLASH_PARMS_ADDR ( UINT16* )0x40c000 - #define FLASH_BSP_ADDR ( UINT16* )0x410000 - #define FLASH_FFS_ADDR ( UINT16* )0x450000 - #define START_SIZE 0x40000 - #define MAC_SIZE 0xfc - #define PARMS_SIZE 0x2000 - #define BSP_SIZE 0x170000 - #define FFS_SIZE 0x1b0000 +#define FLASH_START_ADDR ( UINT16* )0x400000 +#define FLASH_MAC_ADDR ( UINT16* )0x440000 +#define FLASH_PARMS_ADDR ( UINT16* )0x40c000 +#define FLASH_BSP_ADDR ( UINT16* )0x410000 +#define FLASH_FFS_ADDR ( UINT16* )0x450000 +#define FLASH_NVRAM_ADDR ( UINT16* )0x450000 +#define NVRAM_BLOCK (UINT32) 0x0 +#define FLASH_CHECKSUM_ADDR ( UINT16* )0x450000 +#define CHECKSUM_SIZE (UINT32) 0x0 + + +//These are used for the SST version of Flash +#define p5555Reg ( volatile UINT16* ) 0x40aaaa +#define p2AAAReg ( volatile UINT16* ) 0x405554 +#define READ_ARRAY_SST ( UINT16 ) 0xf0 +#define ERASE_SETUP_SST ( UINT16 ) 0x80 +#define SECTOR_ERASE_CONFIRM ( UINT16 ) 0x30 +#define BLOCK_ERASE_CONFIRM ( UINT16 ) 0x50 +#define PROGRAM_SETUP_SST ( UINT16 ) 0xa0 +#define CMD_AA ( UINT16 ) 0xaa +#define CMD_55 ( UINT16 ) 0x55 +#define DQ7 ( UINT16 ) 0x80 +#define TOGGLE_BIT ( UINT16 )( 1 << 6 ) + +#define MFR_ID_INTEL 0x0089 +#define DEVICE_ID_INTELB3_BB_2M 0x8891 +#define DEVICE_ID_INTELB3_BB_4M 0x8897 +#define DEVICE_ID_INTELC3_BB_4M 0x88c5 +#define DEVICE_ID_INTELB3_TB_2M 0x8890 +#define DEVICE_ID_INTELC3_BB_2M 0x88c3 +#define DEVICE_ID_INTELC3_TB_2M 0x88c2 +#define DEVICE_ID_INTELB3_BB_1M 0x8893 + +#define MFR_ID_SST 0x00bf +#define DEVICE_ID_SST_2M 0x2782 + +#define MFR_ID_AMD 0x0001 +#define DEVICE_ID_AMD_TB_2M 0x22c4 +#define DEVICE_ID_AMD_BB_2M 0x2249 +#define DEVICE_ID_AMD_BB_4M 0x22F9 + +#define MFR_ID_MXIC 0x00c2 +#define DEVICE_ID_MXIC_BB_2M 0x2249 +#define DEVICE_ID_MXIC_BB_4M 0x22A8 + +#define MFR_ID_FUJITSU 0x0004 +#define DEVICE_ID_FUJITSU_BB_2M 0x2249 + +#define MFR_ID_STM 0x0020 +#define DEVICE_ID_STM_TB_2M 0x22c4 +#define DEVICE_ID_STM_BB_2M 0x2249 + +#define MFR_ID_SHARP 0x00b0 +#define DEVICE_ID_SHARP_BB_2M 0x00e9 + +#define MFR_ID_ATMEL 0x001f +#define DEVICE_ID_ATMEL_BB_2M 0x00c0 + +#define MFR_ID_HYNIX 0x00AD +#define DEVICE_ID_HYNIX_BB_4M 0x227D + +typedef enum +{ + INTEL_TYPE_FLASH_BB, + SST_TYPE_FLASH_BB_2M, + SHARP_TYPE_FLASH_BB_2M, + INTEL_TYPE_FLASH_TB_2M, + STM_TYPE_FLASH_BB_2M, + MXIC_TYPE_FLASH_BB_2M, + STM_TYPE_FLASH_TB_2M, + ATMEL_TYPE_FLASH_BB_2M, + AMD_TYPE_FLASH_BB_4M, + MXIC_TYPE_FLASH_BB_4M, + HYNIX_TYPE_FLASH_BB_4M, + UNSUPPORTED_FLASH - //These are used for the SST version of Flash - #define p5555Reg ( volatile UINT16* ) 0x40aaaa - #define p2AAAReg ( volatile UINT16* ) 0x405554 - #define READ_ARRAY ( UINT16 ) 0xf0 - #define ERASE_SETUP ( UINT16 ) 0x80 - #define SECTOR_ERASE_CONFIRM ( UINT16 ) 0x30 - #define BLOCK_ERASE_CONFIRM ( UINT16 ) 0x50 - #define PROGRAM_SETUP ( UINT16 ) 0xa0 - #define CMD_AA ( UINT16 ) 0xaa - #define CMD_55 ( UINT16 ) 0x55 - #define DQ7 ( UINT16 ) 0x80 - #define TOGGLE_BIT ( UINT16 )( 1 << 6 ) - #else - #define FLASH_MAC_ADDR ( UINT16* )0x408000 - #define FLASH_START_ADDR ( UINT16* )0x400000 - #define FLASH_PARMS_ADDR ( UINT16* )0x404000 - #define FLASH_BSP_ADDR ( UINT16* )0x410000 - #define FLASH_FFS_ADDR ( UINT16* )0x450000 - #define START_SIZE 0x40000 - #define MAC_SIZE 0xfc - #define PARMS_SIZE 0x2000 - #define BSP_SIZE 0x170000 - #define FFS_SIZE 0x1b0000 - - #define p5555Reg ( volatile UINT16* ) 0x40aaaa - #define p2AAAReg ( volatile UINT16* ) 0x405554 - #define READ_ARRAY ( UINT16 ) 0xf0 - #define ERASE_SETUP ( UINT16 ) 0x80 - #define SECTOR_ERASE_CONFIRM ( UINT16 ) 0x30 - #define BLOCK_ERASE_CONFIRM ( UINT16 ) 0x50 - #define PROGRAM_SETUP ( UINT16 ) 0xa0 - #define CMD_AA ( UINT16 ) 0xaa - #define CMD_55 ( UINT16 ) 0x55 - #define DQ7 ( UINT16 ) 0x80 - #define TOGGLE_BIT ( UINT16 )( 1 << 6 ) - #endif -#endif +} eFlash; -#define MFR_ID_INTEL 0x0089 -#define DEVICE_ID_INTELB3_BB 0x8891 -#define DEVICE_ID_INTELB3_TB 0x8890 -#define DEVICE_ID_INTELC3_BB 0x88c3 -#define DEVICE_ID_INTELC3_TB 0x88c2 -#define DEVICE_ID_INTELB3_BB_4M 0x8897 - -#define MFR_ID_SST 0x00bf -#define DEVICE_ID_SST 0x2782 - -#define MFR_ID_AMD 0x0001 -#define DEVICE_ID_AMD_TB 0x22c4 -#define DEVICE_ID_AMD_BB 0x2249 - -#define MFR_ID_MXIC 0x00c2 -#define DEVICE_ID_MXIC_BB 0x2249 - -#define MFR_ID_STM 0x0020 -#define DEVICE_ID_STM_TB 0x22c4 -#define DEVICE_ID_STM_BB 0x2249 - -#define MFR_ID_SHARP 0x00b0 -#define DEVICE_ID_SHARP_BB 0x00e9 +typedef enum +{ + INTEL, + SST, + STM, + MXIC, + DONT_ERASE +} eFlashErase; #define READ_IDENTIFIER ( UINT16 )0x90 #define SDRAM_START_ADDR ( UINT16* )0x800000 -//#define SDRAM_MAC_ADDR ( UINT16* )0x80a000 -//#define SDRAM_PARMS_ADDR ( UINT16* )0x80c000 -//#define SDRAM_BSP_ADDR ( UINT16* )0x810000 -#define SDRAM_FFS_ADDR ( UINT16* )0x900000 +#define SDRAM_MAC_ADDR ( UINT16* )0x840000 +#define SDRAM_PARMS_ADDR ( UINT16* )0x80c000 +#define SDRAM_BSP_ADDR ( UINT16* )0x810000 +#define SDRAM_FFS_ADDR ( UINT16* )0x850000 +#define SDRAM_CHECKSUM_ADDR ( UINT16* )0x820000 #define BOOT_BLOCK_END ( UINT16* )0x410000 +#define SECOND_BOOT_BLOCK_END ( UINT16* )0x420000 #define MAIN_BLOCK_END ( UINT16* ) 0x5f0000 -//#define FLASH_SIZE ( UINT32 )0x200000 + #define NUM_BOOT_BLOCKS 8 -#define pMfrIDReg ( volatile UINT16* )( FLASH_START_ADDR ) +#define pMfrIDReg ( volatile UINT16* )( FLASH_START_ADDR ) #define pDeviceIDReg ( volatile UINT16* )0x400002 -#define pCUIReg ( volatile UINT16* )0x400000 -#define pDeviceSizeReg ( volatile UINT16* )0x400027 +#define pCUIReg ( volatile UINT16* )0x400000 #define WSMS_READY ( UINT16 )( 1 << 7 ) #define ERASE_ERR ( UINT16 )( 1 << 5 ) @@ -149,12 +146,12 @@ #define BLOCK_LOCK_ERR ( UINT16 )( 1 << 1 ) #define FLASH_ERR ( UINT16 )( ERASE_ERR | PROG_ERR | Vpp_ERR | BLOCK_LOCK_ERR ) +#ifdef CONFIG_BD_TIBURON +#define CNXT_FLASH_SEGMENT_SIZE 2*1024 +#else +#define CNXT_FLASH_SEGMENT_SIZE 1024 +#endif #include -#endif - - - - - +#endif diff -ur uc-origs/uClinux-2.4.27-uc1/include/asm-armnommu/arch-cx821xx/cnxtflash.h uClinux-2.4.27-uc1/include/asm-armnommu/arch-cx821xx/cnxtflash.h --- uc-origs/uClinux-2.4.27-uc1/include/asm-armnommu/arch-cx821xx/cnxtflash.h 2004-12-12 21:48:49.000000000 +0100 +++ uClinux-2.4.27-uc1/include/asm-armnommu/arch-cx821xx/cnxtflash.h 2005-01-21 17:26:35.000000000 +0100 @@ -26,7 +26,16 @@ CNXT_FLASH_SEGMENT_5 = 4, CNXT_FLASH_SEGMENT_6 = 5, CNXT_FLASH_SEGMENT_7 = 6, - CNXT_FLASH_SEGMENT_8 = 7 + CNXT_FLASH_SEGMENT_8 = 7, + CNXT_FLASH_SEGMENT_9 = 8, + CNXT_FLASH_SEGMENT_10 = 9, + CNXT_FLASH_SEGMENT_11 = 10, + CNXT_FLASH_SEGMENT_12 = 11, + CNXT_FLASH_SEGMENT_13 = 12, + CNXT_FLASH_SEGMENT_14 = 13, + CNXT_FLASH_SEGMENT_15 = 14, + CNXT_FLASH_SEGMENT_16 = 15 + } CNXT_FLASH_SEGMENT_E; typedef enum CNXT_FLASH_OWNERS @@ -39,14 +48,25 @@ CNXT_FLASH_OWNER_6 = 5, CNXT_FLASH_OWNER_7 = 6, CNXT_FLASH_OWNER_8 = 7, - CNXT_FLASH_UNUSED = 8 + CNXT_FLASH_OWNER_9 = 8, + CNXT_FLASH_OWNER_10 = 9, + CNXT_FLASH_OWNER_11 = 10, + CNXT_FLASH_OWNER_12 = 11, + CNXT_FLASH_OWNER_13 = 12, + CNXT_FLASH_OWNER_14 = 13, + CNXT_FLASH_OWNER_15 = 14, + CNXT_FLASH_UNUSED = 15 } CNXT_FLASH_OWNER_E; typedef enum CNXT_FLASH_STATUS { CNXT_FLASH_SUCCESS, CNXT_FLASH_DATA_ERROR, - CNXT_FLASH_OWNER_ERROR + CNXT_FLASH_OWNER_ERROR, +#ifdef CONFIG_BD_TIBURON + CNXT_FLASH_DATA_CRC_ERROR, + CNXT_FLASH_DATA_SIZE_ERROR +#endif } CNXT_FLASH_STATUS_E; typedef struct CNXT_FLASH_SEGMENT @@ -82,11 +102,25 @@ #define CNXT_BSP_FLASH_SEGMENT CNXT_FLASH_SEGMENT_1 #if CONFIG_CNXT_ADSL || CONFIG_CNXT_ADSL_MODULE -#define CNXT_ADSL_FLASH_SEGMENT CNXT_FLASH_SEGMENT_2 +#define CNXT_ADSL_FLASH_SEGMENT CNXT_FLASH_SEGMENT_2 +#elif CONFIG_CNXT_GSHDSL || CONFIG_CNXT_GSHDSL_MODULE +#define CNXT_DSL_FLASH_SEGMENT CNXT_FLASH_SEGMENT_2 #endif #if CONFIG_CNXT_VOIP || CONFIG_CNXT_VOIP_MODULE -#define CNXT_VOIP_FLASH_SEGMENT CNXT_FLASH_SEGMENT_3 +#define CNXT_VOIP_FLASH_SEGMENT CNXT_FLASH_SEGMENT_3 +#endif + +#define CNXT_TESLA_FLASH_SEGMENT CNXT_FLASH_SEGMENT_4 + +#if CONFIG_CNXT_WLAN || CONFIG_CNXT_MODULE +#define CNXT_WLAN_FLASH_SEGMENT CNXT_FLASH_SEGMENT_5 +#endif + +#define CNXT_BSPBOOT_FLASH_SEGMENT CNXT_FLASH_SEGMENT_6 + +#if CONFIG_CNXT_GSHDSL || CONFIG_CNXT_GSHDSL_MODULE +#define CNXT_GSHDSL_FLASH_SEGMENT CNXT_FLASH_SEGMENT_7 #endif #endif